JPH0120459B2 - - Google Patents

Info

Publication number
JPH0120459B2
JPH0120459B2 JP58226440A JP22644083A JPH0120459B2 JP H0120459 B2 JPH0120459 B2 JP H0120459B2 JP 58226440 A JP58226440 A JP 58226440A JP 22644083 A JP22644083 A JP 22644083A JP H0120459 B2 JPH0120459 B2 JP H0120459B2
Authority
JP
Japan
Prior art keywords
processor
slave
data
master processor
memory block
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58226440A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60118967A (ja
Inventor
Haruyoshi Kakya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujifilm Business Innovation Corp
Original Assignee
Fuji Xerox Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Xerox Co Ltd filed Critical Fuji Xerox Co Ltd
Priority to JP58226440A priority Critical patent/JPS60118967A/ja
Publication of JPS60118967A publication Critical patent/JPS60118967A/ja
Publication of JPH0120459B2 publication Critical patent/JPH0120459B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
JP58226440A 1983-11-30 1983-11-30 マルチプロセツサシステム Granted JPS60118967A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58226440A JPS60118967A (ja) 1983-11-30 1983-11-30 マルチプロセツサシステム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58226440A JPS60118967A (ja) 1983-11-30 1983-11-30 マルチプロセツサシステム

Publications (2)

Publication Number Publication Date
JPS60118967A JPS60118967A (ja) 1985-06-26
JPH0120459B2 true JPH0120459B2 (en]) 1989-04-17

Family

ID=16845138

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58226440A Granted JPS60118967A (ja) 1983-11-30 1983-11-30 マルチプロセツサシステム

Country Status (1)

Country Link
JP (1) JPS60118967A (en])

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4887741A (en]) * 1972-02-18 1973-11-17
JPS5926055B2 (ja) * 1979-02-24 1984-06-23 富士通株式会社 デ−タ処理方式
JPS5857776B2 (ja) * 1979-04-04 1983-12-21 株式会社日立製作所 デ−タ転送装置

Also Published As

Publication number Publication date
JPS60118967A (ja) 1985-06-26

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